How to solve this error in Quartus -II cyclone FPGA ?

[vsrpkumar]

urgent help

How to solve this error quartus -II cyclone FPGA

Error: Can't place logic cells assigned to one LAB into a single LAB
Info: LAB legality constraint that was not satisfied: Too many distinct clock/clock enable pair signals must be brought into a LAB. Resources used: 3. Resources available: 2.

 

[agump]

urgent help

There are just two clock/clock enable control signal in a LAB of cyclone. Maybe you have use more than two clock or two clock enable signal and unfortunately assign them to a LAB. Check you code.