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I am using IrDA Board. it was warking before 2 years. and now i am using after 2 years there is some Clearance Error that i cant understand. If somebody have some Idea plz help me...thanks
It depends on the capability of the company making the boards. You would need to have less than 6 thou for the design rule to avoid the DRC error but that is smaller than common board clearances. If you want to change the clearances to remove the errors then go to DRC/creanaces and edit the 7mil to something less then 6mil. Most of them are pad-pad errors.
If it was me, I would change the package. The pads are too wide for SSOP20 and in fact the pitch looks slightly wrong.
Thanks keith.. I will change the Package.. Can you plz explain about "hole drilling through a track on your JTAG connector". what is the solution fo that.. Thanks in advance
It is the "dimension error" shown here on the mounting hole of the JTAG connector:
You simply need to move the track - there is plenty of space.
To change the footprint, you can copy the SSOP20 from the "ref_packages.lbr" - after first checking it is the correct dimension for your part. Then create an alternative variant of the part with the new SSOP20. You can copy the connections. Then you can update the part in the board and change the package. That way the tracking will be preserved. If that all sounds too complicated then you will need to re-do the final tracking to the part after deleting & replacing it.
Keith.
---------- Post added at 15:12 ---------- Previous post was at 15:09 ----------
One other comment - your grids are not good choices. You have a 0.01mm primary grid. Normally I would set that at maybe half the pitch of the surface mount devices and then set the alternative grid to maybe half that again. At 0.01mm you are virtually drawing freehand - the grid is not helping you.
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