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How to simulate VCO pulling effect?

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GDF

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vco pulling simulation

Anybody knows how to simulate the pulling effect? May I simulate it
by Cadence or ADS? I would like to see the VCO interferred by PA.
The VCO frequency is 1.6GHz, PA is running at 1.9GHz.

Thanks,
 

vco pulling effects

Hi

Wouldn't 300MHz difference be too far and be attenuated
by TX PLL loop filters ? May be you should make your interfer frequency
more close to the target VCO, tha't say, difference within TX loop bandwidth
, otherwize the pulling may be negilible.

How do you think ?

Regards,
 

vco pulling & pushing measurment

For such tests I just keep things simple. I hook an attenuator made up of resistors set to the proper value to create the magnitude return loss I want. I then hook up a 50 ohm transmission like with a short circuit at the far end, and let the length of the line vary.

If I wanted a 12 db return loss of any angle, I would set the attenuator resistor values to yield a 6 dB insertion loss.
 

vco pulling specification

General principal to figure out a pulling effect is to apply 10:1 SWR ratio. So, in simulation environment, a ideal switch can be used to change load of the VCO to observe the frequency sensitivity regarding to load.

For instance, a PSS or HB analysis can be performed with ideal load and diverged load and the frequency of oscillation should be compared between two state.
 

Re: VCO pulling

Sorry, but you are wrong. You have to simulate an arbitrary changing load angle too.
 

Re: VCO pulling

biff44 said:
Sorry, but you are wrong. You have to simulate an arbitrary changing load angle too.

I don't think so..

When you check the datasheets of VCO manufacturers, you'll see that "Pulling Specifications" have been given at 1:10 SWR ratio.This measurment is quite easy but it's not possible to say the same thing for their simulations.

At least we do our measurments. We check the frequency of oscillation under 50 ohm termination and then we switch over 1:10 SWR ration while we observe frequency-time measurements.

If an arbitrary value has been used, in that case specification must'd be different..
Isn't it ??

So to overcome this inconsistency, certain changing value and certain ratio should be used.

And also, load angle is not easly controlled element.
 

Re: VCO pulling

i think the author want to see the injecting lock phenomenon!
right?
 

Re: VCO pulling

There are names for the two different effects!

VCO Pulling: Means load variation effect on VCO phase/frequency performance

VCO Pushing: Means effects on supply and control voltages

If you inject a small tone which harmonic related to the natural frequency on the supplies (VDD,VSS, Substrate) you will get a phase reaction. If the small tone is coupled with the VCO output (synthesizer, PA) the frequency will shift.

Simulation of this effect is little tricky. Phase pertubation could be best seen by simulating two VCOs. One impacted, the other not. Make a phase difference plot. If the frequency shift should be observed you have to search for the coupling element. In most cases the substrate or supply. Simulate with and without the coupling but be careful not to change bias conditions. So only inductance change or zero DC current resistive substrate path are allowed. Otherwise the result is not true. You have to search for some kHz at some GHz!!!
 

VCO pulling

I am also frustrate to simulate injection locking phenomenon but I think the the author want to know the pulling effect due to the PA. 1900 MHz and 1600 MHz are too far from locking range. I would add 1900 MHz signal to the input port of the VCO (where you put the "OSC port" and see the output. You can very 1900 MHz source power to see its effect of the output. I also would use Transient simulation to see it effect on the VCO start up.
 

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