how to simulate the parameters of nanometer device

[chibijia]

recently i am doing some work about interconnect problem with repeater insertion, and i need to got some parameters of buffer(also inverter), take 65nm as an example, now i suppose the width of inverter is the minimize size,and its load capacitance is 10fF;
i want to simulate the inverter to get the equivalent resistance of inverter, and its equivalent input capacitance and parasitic capacitance.
whether i can get the results i want?
can anybody help me??
thanks and regards!

 

[sjamil02]

How about doing some hand calculation.

Equivalent NMOS and PMOS:

Rn = [2.VDD/μnCox(VDD-Vthn)2].[Ln/Wn] and
Rp = [2.VDD/μpCox(VDD-Vthp)2].[Lp/Wp]

Cin = 3/2COX'Wn.Ln + 3/2COX'Wp.Lp where COX' = Eox/Tox.
Cout = Coutn+Coutp , where Coutn=COX'.Wn.Ln and Coutp=COX'.Wp.Lp

Un and Up = carrier mobility can be obtained from the model file. Or can be extracted from single transistor's simulation. Same with Vthn and Vthp which is the threshold voltage of the transistors.

Hope it helps.
SJ

You can refer to Baker's Book (CMOS Circuit Design) for more information.

 

[chibijia]

o,thanks to sjamil!
if ony the resistoance and capacutance needs,this may work sometimes!
besides these, the leakaged current and short_circuit current also needs,
so i wish to use eda tool(hspice) to simulate it.