I am designing a latched comparator (dynamic type).
How can I set up the simulation to get the performance in offset and speed??
I also need Monte Carlo and Corner model verification. Thank you.
The procedure I describe is for clocked (latched) comparator. In case of continuous time comparator, you need only perform a sweep of your input keeping the other one to a reference and then find the level at which your output toggle through a .DC analysis (this avoids errors due to the switching delay).
The procedure I describe is for clocked (latched) comparator. In case of continuous time comparator, you need only perform a sweep of your input keeping the other one to a reference and then find the level at which your output toggle through a .DC analysis (this avoids errors due to the switching delay).
Meaning as listed in Textbooks is it necessary to use dual power supply (Vdd=1.8 Vss=-1.8) and check the Vos for 0 Axis crossing of Sweep (say input) ?