I am designing a switched-capacitor common feedback full differential operational transconductor amplifier, but I couldn't know how to simulate gain and phase margin of switched-capacitor OTA using Cadence tools?
to simulate gain and phase margin, you need to cut the loop somewhere to simulate. For the common mode loop, you can use a vcvs to extract the output common mode, then use another vcvs to give it an offset to load it on the cmfb input of the opamp so that the common mode can close.