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how to simulate sigma-delta adc (transistor level)

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rama kiran

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i heard that many people will simulate sigma delta adc(transistor level)in cadence.can i use mentor graphics or hspice. what is the difference with these tools.
 

there wont be much of a difference between the different simulations... it all depends on the model and level of a particular component being used...
 

Hspice or eldo also can simulate the sigma-delta adc.

The difference is minor I think.

Eldo is faster than Hspice in my experience.

Hspice may have some convergence issue.

Yibin.
 

What is the difference between delta-sigma or other circuits?
 

I have Hspice Hsim and spectre, whichone is the best tools to simulate sigma delta adc ?
 

The difference in these tools is naturally the precision. In fact some tools gives siluation results very close to those give by the implented design on silicon and these are, of course the best.
There is another intersting tool TSPICE (product of tanner research) than you can try to simulate you Delta sigma at transistor level.
Regards,
Master_PicEngineer
 

rama kiran said:
i heard that many people will simulate sigma delta adc(transistor level)in cadence.can i use mentor graphics or hspice. what is the difference with these tools.


Eldo and Hspice is the batch mode simulator, but cadence is the graphic simulator,
this is to say, you need write the stimul yourself.
 

Hi, I was wondering....to simulate DSADC in transistor level, is long transient + taking the power spectrum the only way to simulate the design? Because this can sometimes take weeks.....is there a faster way?

Thanks
 

use the sd toolbox of the Simulink in matlab when you find the coefficient is you are in S domain use Gm-C ciruits and check your design with spectre, hspice, or mentor graphix
 

I'm afraid that in the end you always need the transient with days (even weeks) of simulation. At least I don't know anything better.
 

There is a parallel Spice simulator that can do long Sigma-Delta ADC transient simulation in 1 day: Gsim from Gemini Design Technology, Inc. (http://www.gemini-da.com)

This is our detailed benchmark data:

Circuit Size: 17477 bsim3v3's, 53632 capacitors, 600 resistors, ...
Circuit Type: Sigma Delta ADC
Matrix Size: 37336
Transient Simulation Stop Time: 63us
Total # of Simulation Time Steps: 1037144

Simulation Elapse Time (Wallclock Time) : 27+ hours

Baolin Yang, Ph.D.
Gemini Design Technology, Inc.
http://www.gemini-da.com
 

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