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how to simulate leakage of CMOS switch

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taofeng

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an interview question

what is the difference of these two inverters ? one of them I know is current starved inverter, the other I do not know the name.
 

Re: an interview question

They are both tri-tate invertors, output is high impedance when n and p turned off.
The Left hand side invertor could be used in current starved mode also.
 

an interview question

They are both current-starved. The difference is in the
position of the "master" (current mirror) and "switch"
elements.

The one on the right will probably have to embed an "on"
switch replica in the bias current master if you want a
particularly good match, while the one on the left is a
straight device match.

I think the one on the left will be "noisier" to the output
because the Miller kick from the input will directly perturb
the output node. The one on the right will be quieter at
the output, but may put more noise back into the bias
rack. You'd have to simulate with decent parasitic values
to judge properly.
 

an interview question

I think the left one would be slower than the right one becaouse of the miller effect.
 

Re: an interview question

Both will act as the invertor, with a combination of IN and vbp vbn.
so basically ithey differ in operation wise. for both they have different dependency on the IN vbp and vbn to the output.
Miller effect if it is it will be on both side, as you can not decide the input signal by just IN name. So miller effect will occur on both inverter.

Am i right??

regards
viren
 

Re: an interview question

The left one can generate a very long trise or tfall by setting Vbp or Vbn to limit the current.

For the right one, if Vbp is very high or Vbn is very low, it will act the same as the left one, however, if Vbp is low enough or Vbn is high enough , it can generate a very short trise or tfall by using cascode structure to increase the gain of the inverter.

That's the difference, i think.
 

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