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yup i got the IC . just that i don know how to start on signal Generator .. ( if is a Core_gen i can still work on it ) but kind of different err anyone help
i need to link the output of the ADC to the DAC
meaning ADC output to DAC input ( 8bit to 8bit )
( anyone know how to write in VHDL )
anyhow please help ~~
Added after 5 hours 5 minutes:
i need to link the output of the ADC to the DAC
meaning ADC output to DAC input ( 8bit to 8bit )
( anyone know how to write in VHDL )
anyhow please help ~~
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity assign4 is
Port ( X : in STD_LOGIC_VECTOR (9 downto 0);
res : in std_logic;
m_clk : in std_logic;
out0, out1, out2, out3, out4, out5, out6, out7 : out STD_LOGIC_VECTOR (9 downto 0));
end assign4;
architecture Behavioral of assign4 is
type State_type is (S0,S1,S2,S3,S4,S5,S6,S7);
signal current_state,next_state : state_type;
Signal p0,p1,p2,p3,P4,P5,P6,P7 : STD_LOGIC_VECTOR(9 downto 0):="0000000000";
begin
process (m_clk, res)
begin
If res='1' then current_state <= S0;
elsif m_clk'event and m_clk='1' then
current_state <= next_state;
end if;
end process;
process ( current_state, X )
begin
case current_state is
when S0 => p0 <= X;
next_state <= S1;
when S1 => p1 <= X;
next_state <= S2;
when S2 => p2 <= X;
next_state <= S3;
when S3 => p3 <= X;
next_state <= S4;
when S3 => p4 <= X;
next_state <= S5;
when S3 => p5 <= X;
next_state <= S6;
when S3 => p6 <= X;
next_state <= S7;
when S3 => p7 <= X;
next_state <= S0;
end case;
end process;
process ( current_state )
begin
if current_state <= S0
then
out0 <= p0;
out1 <= p1;
out2 <= p2;
out3 <= p3;
out4 <= p4;
out4 <= p5;
out4 <= p6;
out4 <= p7;
end if;
end process;
end Behavioral;
wowow i was sick that day . so never got a chance to come and see.. keke soo good ^^ he still wish you good luck muahahaha . what are you doing so free now
jason
where are you
i need to ask you about DDS
help~~~
reply me asps
tmr afternoon i need to test hope you see this message
drop me email ( hey_56@hotmail.com )
how to make the DDS
8bit
120MHZ
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