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How to set a node to a particular voltage ?

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IntuitiveAnalog

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Hi Everyone,
I am designing a circuit in which the requirement is , if the signal crosses a particular threshold i.e. Vref then signal should settle to -Vsat. I am trying the topology attached below but its not working. I will be thankful if anyone could comment on it.

Thanks

 

Hi

This might not work depending on the strength of your left black box circuit. Can you give a little bit more details on this??
Moreover, in your design, once Vsignal is set to -Vsat, how do you reset your comparator?
 

Hi chris.mourad,
First of all I am thankful to you for your response.
Actually there is feedback network which is shown as a black box. I have already tried making NMOS quite stronger even then its not working.
When Vsignal will set to -Vsat then comparator output will go low and because of the feedback network Vsignal will again rise and this cycle will repeat.
 

You should map out the sequence of events you want,
including how / when to exit and initialization. Your drawn
loop would seem to be linear or hysteretic, might be prone
to self-oscillate once triggered, etc. You probably want to
get away from continuous-time, move to a clocked state
machine (maybe with a second comparator to monitor
when exit should happen, or whatever).
 

Is Vsat is less than Vref ?, if yes , Then you can try using a PMOS which will pull down the Vsing to Vsat . In which case your comparator -ve side should be connected to Vsign and the Vref to +ve side and output of comparator to PMOS gate.
 

Sorry, in that case also it oscillate. if you want do this for only once then you can put a switch between Vsign and comparator i/p point which will again be controlled by the comparator o/p.
 

Dev_RM , yes Vsat<Vref. I want to perform this task repeatedly. So I think a single switch won't work.
 

Please come back with a clear description of intended circuit operation. It hasn't been given yet, I'm under the impression that you didn't actually think it to the end.
 

FvM, the intended circuit operation has been given in my first and second comment.
It should be:
1. When Visgnal crosses Vref , then Vsignal should be pulled to Vsat (Vsat< Vref) momentarily.
2. Now Vsignal which is on Vsat level will again rise and cross Vref and this cycle will repeat.
The problem which I am facing is that despite making NMOS quite stronger Vsignal is not being pulled to Vsat.
 

FvM, the intended circuit operation has been given in my first and second comment.
Neither clearly nor completely, I think.

With the NMOS transistor connected to a negative voltage, the circuit will just act as a voltage limiter to Vref.

You need a bistable circuit with two thresholds or a monostable circuit with delay to discharge the Vsignal node to -Vsat. Your specification only tells under which condition the transistor switch has to be activated. But it doesn't consider how long it should be switched on and when it's deactivated.
 

FvM , the switch has to turn on just momentarily. As when Vsignal (which is input to + terminal of comparator) goes below Vref then output of comparator will go low and switch will turn off.
 

"Momentarily" doesn't specify a duration. If it's really short, Vsignal won't be pulled below Vref, resulting in a pure voltage limiting operation. The level of Vsat is meaningless in this case, it's only acting as an auxilary supply to discharge Vsignal.

The description is consistent with the circuit in post #1, but in contrast to your initial specification, Vsignal will never "settle to -Vsat".
 

Fvm, yes I agree I should not have used "settle to -Vsat" , instead I should have used Vsignal pulled to Vsat.
Even if I assume there is a short duration for which switch is ON then how can I control time for which switch is ON? Could you please give some more insight regarding it.
 

Does it mean you actually want the voltage limiting to Vref? In this case, the post #1 circuit can basically work, but needs frequency compensation for stable operation. More easily it can be achieved with the OP and a diode, provided the OP output current (e.g. 10 mAor 20 mA) is sufficient.
 

FvM, No I do not want voltage limiting to Vref. Vref is just a threshold , when Vsignal becomes greater than Vref, then my objective is just to pull Vsignal to a particular voltage which is less than Vref. (As far as time duration of pulling is concerned , its not a hard constraint.)
Do I need some modification in the circuit given in post#1 to meet this objective?
 

Do I need some modification in the circuit given in post#1 to meet this objective?
Yes, surely. You either need a monostable circuit that activates the switch for a defined time duration or a bistable circuit (e.g. schmitt-trigger) that releases the switch at a specific voltage level.
 
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