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how to remove 1/f noise in SC amplifier

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shamala

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Hi
I am trying to build 14bit cyclic ADC. For that i have to reduce noise in op-amp. So how can we reduce the noise in op-amp? Can we use corelated double sampling in Switched Capacitor residue amplifer.
And how much should be the noise for 14bit performance ADC with LSB of 0.15m?
 

Correlated double-sampling will indeed reduce 1/f noise in an SC op amp.

This discusses the noise performance of an ADC.
 

thanx for reply. i have implemented one correlated double sampling MDAC, but in pss noise analysis it is not working. the flicker noise is not coming down. do you have any paper or something that shows the implementation of correlated double sampling in pipeline adcs?
 

CDS.JPG

In first phase of clock (phase_1) i am sampling vin to Cs and Cf, at the same time by resetting op-amp to vcm i am trying to store the offset and 1/f noise in Coff capacitor. In the second phase (phase_2) op-amp with stored offset is used as amplifier for getting gain of 2.
 

You can not have a capacitor (Coff) in series with the op amp input without a DC bias path. Look at Figure 21 of this reference to see a typical offset and 1/f noise cancellation circuit.
 

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