how to reduce parasitics at switching node of the switcher?

[chinito]

Hi,

How do I reduce parasitic cap at switching node of the switcher layout? How to layout power fets? If we're stuck with the parasitic, can we do something about that cap (tuning maybe?) Thanks.

Chinito

 

[v_c]

Re: how to reduce parasitics at switching node of the switch

Make sure that the loop area made by the switching element and also the diode are not too large. I you are using axial lead components keep the lead length as short as you can. You have to make the transistor and the diode as close as possible to keep the inductances low, but of course you have to have some "keep out area" for thermal and other issues. If you see ringing you might have to put RC snubbers, especially across the diode. Beware of the reverse-recovery effect of the diode. The reverse recovery spike -- which lasts on the order of 30-50ns -- along with the parasitics can cause lots of problems.

Best regards,
v_c

 

[sunking]

split the switcher
reuse the connecter