ttgg
Newbie level 1
hi,
leon2 is a 5 pipeline 32 bits micro-processor,and it is open source.
I want to design this chip as my thesis. however, the power that I analysis with power compiler is mainly spent on cache. it is over 80% of the total power.
I have use methods such as:clock gating, operation isolation, address bus grey coder.
what can i do to reduce this power on cache?
thanks!
leon2 is a 5 pipeline 32 bits micro-processor,and it is open source.
I want to design this chip as my thesis. however, the power that I analysis with power compiler is mainly spent on cache. it is over 80% of the total power.
I have use methods such as:clock gating, operation isolation, address bus grey coder.
what can i do to reduce this power on cache?
thanks!