Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
New chip from REDUX:
The StelaGate RS-160 is a single chip solution for point-to-point tunneling of unstructured E1/T1/J1 over Ethernet-based and HDLC-based packet links.
The RS-160 provides:
Packetization of an E1/T1/J1 circuit transparent to the TDM signaling
Transmission of packetized E1/T1/J1 over any 10/100 Ethernet link or HDLC packet service link
On-chip clock recovery
Packet re-ordering
Bridging and multiplexing of 10/100 Ethernet together with packetized TDM circuit over packet service link
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
