How to realize on-chip low value resistor as precise as possible

[pavel_adameyko]

Hello, dear friends)
I want to make low ohmic resistance - let's say - 30 ohm using 240 ohm/sq resistors. and i want to make my resistance as precise as possible against mismatch. So what you advice me to do? Is it better to use one big 80um*10 um resistor or 40 parallel 2um*10um ?
Thanks for advance)

 

[erikl]

Is it better to use one big 80um*10 um resistor or 40 parallel 2um*10um ?

A short resistor is very inaccurate. Use your latter proposal, or even 80 parallel 1um*10um (about the same area, but larger L/W ratio achieves better accuracy).

 

[pavel_adameyko]

A short resistor is very inaccurate. Use your latter proposal, or even 80 parallel 1um*10um (about the same area, but larger L/W ratio achieves better accuracy).

Thanks for your reply.
Can you explain a bit more why short resistor is inaccurate?

 

[erikl]

... why short resistor is inaccurate?

You know the resistance R ~ L/W .

The worst case (or max.) relative L/W inaccuracy is inversely proportional to the resistor L/W ratio itself.
If we just consider L and W inaccuracies (due to lithography and etch errors), then we get relative errors ΔL/L and ΔW/W , say e.g. ΔL/L = ΔW/W = 1% = 0.01.

Then the relative error of the L/W ratio (which means the relative error of the resistor value) is Δ(L/W) / (L/W) = (ΔL/L ± ΔW/W) / (L/W)
The ± sign means the relative length and width errors could compensate each other (-) -- which is the best case -- or they could add (+), which is the worst case.

Of course we have to consider the worst case. In the example above, for your short resistor (L/W=1/8) the above equation results in a w.c. relative L/W error of (0.01+0.01)/0.125 = 0.16 = 16%.

For your "long" resistor example (L/W=5), a w.c. relative L/W error of 0.02/5 = 0.004 = 0.4% would result.
With my suggestion (L/W=10), the max. relative L/W error would be 0.02/10 = 0.002 = 0.2% .

Many devices in parallel (symmetrical / common centroid layout assumed) tend to counterbalance the relative error even more.

 

[pavel_adameyko]

Hello, erikl)
First of all thanks for your share. But i'm a bit confused
R = a*(L/W), then taking derivative we get ΔR = aΔL/W - aLΔW/W², then ΔR/R = (aΔL/W - aLΔW/W²)/(aL/W ) = ΔL/L - ΔW/W :sad:
So ΔR/R depends only on ΔL/L and ΔW/W . If we have ΔL/L=0.01 and ΔW/W=0.01 then worst case mismatch would be 2 percent anyway.

 

[erikl]

Thank you for reworking this topic! After checking into that issue, I think you are right, see e.g. Propagation_of_uncertainty (Example formulas, f=A/B) or Error Propagation ((b) Multiplication and Division: z = x y or z = x/y , eqs. 2).

Considering uncorrelated errors -- which might be applicable to a certain amount for orthogonal affecting process steps -- even a quadratic error addition (root of squared sums) could be considered, so resulting in only 1.4% of total error instead of 2% in the above example.

However, I should warn you anyway about using too small dimensions: Probably there are no constant length/width errors, but there will be a (max.) absolute error, which strikes hard for small dimensions.

 

[pavel_adameyko]

Thanks again)
As for relative error we det to conclusion that two situations are equivalent.
As for absolute error. Let's denote absolute error of width ΔW and absolute error of length ΔL.
Resistor have length L and total width W. L/W = q = const - number of squares. So we need to find out the optimum number of parallel resistors to minimize the deviation of the whole resistance. If we have N parallel resistors the L and W/N are individual length and width of each one. So the total relative error would be
(ΔR/R)²=(ΔL/L)²/N+(ΔW/W/N)²/N=(ΔL/L)²/N+N(ΔW/W)²= {W=L/q} = (ΔL/L)²/N+Nq²(ΔW/L)².
A reasonable assumption that ΔL=ΔW. then we have (ΔR/R)²=(ΔL/L)²/N+Nq²(ΔL/L)²=(ΔL/L)²(Nq²+1/N).
Function Nq²+1/N has just one minimum at N=1/q. So the optimum number of parallel resistors is equal to inverse number of squares. In our case it would be 8. So we should use square resistors!
Let's calculate square erroe for some examples. Assume ΔL=ΔW=0.1 um, L=10 um, W=80 um.
N=1 - resistor with L=10um and W=80um - (ΔR/R)²=(0.01)²+(1/800)², so (ΔR/R)= 1.008 %
N=8 - resistors with L=10um and W=10um - (ΔR/R)²=(0.01)²/8+(1/100)²/8, so (ΔR/R)= 0.5 %
N=40 - resistors with L=10um and W=2um - (ΔR/R)²=(0.01)²/40+(1/20)²/40, so (ΔR/R)= 0.81 %
N=80 - resistors with L=10um and W=1um - (ΔR/R)²=(0.01)²/80+(1/10)²/80, so (ΔR/R)= 1.12 %
So we have almost two times improvement if we consider cases when N=8 and N=1.
Correct me if i'm wrong)

 

[erikl]

A very interesting "ansatz":

So the total relative error would be (ΔR/R)²=(ΔL/L)²/N+(ΔW/W/N)²/N

... but it seems like a hedonistic approach to me. Why do you think you can cut down the individual relative L & W errors by the number N of parallel devices? I think this would be acceptable if you presume that their individual errors would counter-balance each other to a certain extent -- but then there are still N of them to (quadratically) sum up their errors.

I don't think you can fall below the original ΔW/W error value, which lastly depends process-dependently on the total area (L*W) spent. However -- provided there exists a non-underrunnable ΔW resp. ΔL error -- I concede to you that the square (W=L) solution would be optimal.

 

[leo_o2]

If absolute value is required to be accurate, you should use trimming techniques.

 

[mikersia]

leo_o
how your note deals with the topic?