How to realize a long delay on chip

[abcyin]

Hi, all

I'd like to realize a really long delay, like 100us, on chip, and if I just use the RC circuit to make the delay, the passive components will cost a lot of areas due to low sheet resistance and capacitance by the process technology I use.

So what I want to know is that, is there any other good idea to realize such a long delay, either passive or active implementations are both welcome.

Thanks a lot in advance!

 

[checkmate]

If you have a clock somewhere, you could do a digital delay, or a pulsed current capacitor charging delay.

 

[baenisch]

If you have a reliable clock available you can simply use a counter
to count clockcycles. Apart from that you can use a slowed down
inverterchain (loaded outputs or big length). This however yields
in slopes that are totally messed up so you need to reconstruct
proper slopes at the end of the chain

Best Regards

Andi

 

[erikl]

If you don't need high accuracy wrt. PVT, you can load a 1pF cap via a simple 10nA current source, then use a comparator. For higher accuracy use a bandGap controlled current source.

 

[abcyin]

If you don't need high accuracy wrt. PVT, you can load a 1pF cap via a simple 10nA current source, then use a comparator. For higher accuracy use a bandGap controlled current source.

I am not sure how to build the circuit, could you please give me a simplified schematic, thanks very much.

 

[erikl]

I am not sure how to build the circuit, could you please give me a simplified schematic, thanks very much.

But it's so simple, pls. s. below!

 

[abcyin]

Thanks very much, it works.

 

[baenisch]

Hi erikl

I have a question about the accuracy of the circuit you proposed.
How big is the spread of the delay if one considers a process spread
of +- 4.5sigma, temperatur -40 to 140, supply variation ?

I have used something similar in the past and the accuracy was not
very good, up to +-25% ...

Best Regards

Andi

 

[erikl]

I have a question about the accuracy of the circuit you proposed.
How big is the spread of the delay if one considers a process spread
of +- 4.5sigma, temperatur -40 to 140, supply variation ?

I have used something similar in the past and the accuracy was not
very good, up to +-25% ...

Hi Andi,

with a simple current generator (target current about 700nA in this case) we even got -40/+200% for a ±3sigma process spread, ±10% supply variation, -40 to 85°C temperature range.
With a bandGap controlled and (1st order) voltage-compensated current generator we achieved about ±12%, the rest was done with a 5bit trimming circuit: ≤ ±1% .

Beste Gruesse, erikl

 

[baenisch]

Interesting to hear. It seems that this topology is working
much better if I compare your 12% to my 25% solution
before trimming (even if I switch to 3sigma there is still
a difference). I persume you trim the current to bring
the delay on target right ?

Best Regards (aus München )

Andi

 

[erikl]

Best Regards (aus München )

Andi

Hi Andi,
pls. find my PM answer in your messages InBox!
Beste Grüße vom Chiemsee ;-)