how to probe a signal in sv with ovm methodology

[manoj009]

Hi Guys,
I am writing a testcase in SV with OVM methodology and found that I need to probe a signal inside the DUT.
I used a simple "if" statement to see the signal value but I am getting a compilation error.
This is the error:
Error-[SV-LCM-HRP] Hierarchical reference in package

I double checked the signal path and its correct.
Can you kindly guide me in this?

 

[osm3000]

Can you put a sample of the code you're trying ?

 

[dave_59]

Packages must not contain any hierarchical references. Their only dependencies can be on other packages.

See my DVCon paper: The Missing Link: The Testbench to DUT Connection