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How to multiply two numbers in VHDL?

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iliya24

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Hello.

I am a new to vhdl and as a part of my tranning i need to multiplay 2 numbers can u help me and tell my what i doing wrong?


LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
use ieee.numeric_std.all;

ENTITY MUL IS PORT(
a,b: IN unsigned (3 downto 0);

y : OUT unsigned (7 downto 0));
END MUL ;
ARCHITECTURE Behavioral OF MUL IS

BEGIN

process (a,b)

variable temp1:unsigned(7 downto 0);
variable temp:unsigned(7 downto 0);

BEGIN


for j in 0 to 3 loop

if (b(j)='0') then
temp1:=(7 downto 0 =>'0');

else

temp1:=( j=>a(0),j+1=>a(1), j+2=>a(2),j+3=>a(3),others=>'0') ;

temp:=temp+temp1;


end if ;

end loop;

y<=temp;


end process;

END Behavioral;
 

iliya24

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Re: multiply two numbers

I am re posting because i still did not get the answer how to do it without using * i need to do it only with shift and adding the bits because my numbers are binary in signed vector.
I wiil appreciated any help i have wrote an algorithm but it is not working properly (it do compile ) but result is not good.
Thx.
 

TrickyDicky

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Re: multiply two numbers

Whats wrong with the results?
For a mulitplier you need N adders where N is the number of bits.
 

iliya24

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Re: multiply two numbers

The problem is that my out is getting an unknown state. i need to do in behavioral way using for loops not with adder becouse with adders it is not efficient .
Thx.
 

FvM

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Re: multiply two numbers

It seems like you don't understand the meaning of for loops in VHDL. Your code implements four adders.
 

iliya24

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Re: multiply two numbers

Ok but why is temp1 or temp after for loop is in uknoen stae?
Thx
 

FvM

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Re: multiply two numbers

Because you forgot to init temp in front of the for loop;

Code:
temp := (others => '0');
 

iliya24

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Re: multiply two numbers

ok i will try it and i post u back thx
 

iliya24

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Re: multiply two numbers

Hey i tried today but this was not the issue i solved differently.

Thx.
 

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