circuitking
Full Member level 5
Hello,
I have an ASIC that is sending data to FPGA.
Between ASIC and FPGA, I would have LVDS (including Pre-emphasis), Pad, bond-wire, and channel. do all kinds of FPGA's LVDS pins have input impedance as 100 ohm?
Now, I want to estimate the behavior of the Pad, bond-wire, and channel and include them in the LVDS design.
Anyone has inputs on this?. Thanks
I have an ASIC that is sending data to FPGA.
Between ASIC and FPGA, I would have LVDS (including Pre-emphasis), Pad, bond-wire, and channel. do all kinds of FPGA's LVDS pins have input impedance as 100 ohm?
Now, I want to estimate the behavior of the Pad, bond-wire, and channel and include them in the LVDS design.
Anyone has inputs on this?. Thanks