wy21century
Newbie level 6
Hi
I want to model a ADC in verilog and use it in digital simulation. My purpose is to make this behavior the same interface as the true analog one and use it in a digital SOC environment. Write some testbench to test its connection.
My problem is how to model the analog input because it is one bit width signal, how do I model the different input voltage level and convert it to a multi-bits digital output?
Can anyone with this experience help me?
I want to model a ADC in verilog and use it in digital simulation. My purpose is to make this behavior the same interface as the true analog one and use it in a digital SOC environment. Write some testbench to test its connection.
My problem is how to model the analog input because it is one bit width signal, how do I model the different input voltage level and convert it to a multi-bits digital output?
Can anyone with this experience help me?