prcken
Advanced Member level 1
spice integrator
the schematic and simulated waveforms are in the attachment
the problem is there is something wrong with my simulated wvaeform, the ideal output should be start at 0.75V, why, help?
the circuit's netlist is:
*integrator
*CLOCK SIGNALS
vphi1 phi1 0 pulse (0 1.5v 0 200p 200p 4n 10n)
vphi2 phi2 0 pulse (0 1.5v 5n 200p 200p 4n 10n)
r2 phi1 0 1000000
r3 phi2 0 1000000
***************
*input power and references
*vdd vdd 0 dc 1.5
vtrip vtrip 0 dc 0.75
vcm vcm 0 dc 0.75
*******
*use a vcvs for the opamp
Eopamp voutop 0 vcm vinn 100MEG
********
*setup switched capacitors and load
ci vtop vbot 2p
cf voutop vinn 1p
cload vout 0 1p
*********
*** input signals
vin vin 0 sin 0.75 50m 5MEG
*******
*setup switches for the integrator
s1 vcm vtop phi1 vtrip switmod
s2 vin vbot phi1 vtrip switmod
s3 vtop vinn phi2 vtrip switmod
s4 vbot vcm phi2 vtrip switmod
s5 voutop vout phi1 vtrip switmod
**********
*include 'E:\work\l035ply' TT
.option reltol=0.0005
.option abstol=1e-010
.model switmod sw ron=100
.tran 1n 500n
.print tran v(vout) v(vin)
.probe
.end
the schematic and simulated waveforms are in the attachment
the problem is there is something wrong with my simulated wvaeform, the ideal output should be start at 0.75V, why, help?
the circuit's netlist is:
*integrator
*CLOCK SIGNALS
vphi1 phi1 0 pulse (0 1.5v 0 200p 200p 4n 10n)
vphi2 phi2 0 pulse (0 1.5v 5n 200p 200p 4n 10n)
r2 phi1 0 1000000
r3 phi2 0 1000000
***************
*input power and references
*vdd vdd 0 dc 1.5
vtrip vtrip 0 dc 0.75
vcm vcm 0 dc 0.75
*******
*use a vcvs for the opamp
Eopamp voutop 0 vcm vinn 100MEG
********
*setup switched capacitors and load
ci vtop vbot 2p
cf voutop vinn 1p
cload vout 0 1p
*********
*** input signals
vin vin 0 sin 0.75 50m 5MEG
*******
*setup switches for the integrator
s1 vcm vtop phi1 vtrip switmod
s2 vin vbot phi1 vtrip switmod
s3 vtop vinn phi2 vtrip switmod
s4 vbot vcm phi2 vtrip switmod
s5 voutop vout phi1 vtrip switmod
**********
*include 'E:\work\l035ply' TT
.option reltol=0.0005
.option abstol=1e-010
.model switmod sw ron=100
.tran 1n 500n
.print tran v(vout) v(vin)
.probe
.end