xiaofeixia
Junior Member level 3
My LDO is used to support a 1.2V output and 100mA current for digital circuit
when i simulate a LDO, I use a current source witch draw a 100mA current to model output current, but in line regulation simulation, the voltage is minus when the input is small.
but when i use a variable resister witch have a resistance of 1.2/iload, the AC simulation shows a wrong Gain for the resister is much small than the output resistance of the PMOS, but in fact it should be much larger than it.
so how to model the output resistence as the current load of a LDO, thanks a lot
when i simulate a LDO, I use a current source witch draw a 100mA current to model output current, but in line regulation simulation, the voltage is minus when the input is small.
but when i use a variable resister witch have a resistance of 1.2/iload, the AC simulation shows a wrong Gain for the resister is much small than the output resistance of the PMOS, but in fact it should be much larger than it.
so how to model the output resistence as the current load of a LDO, thanks a lot