How to measure settling time of PLL?

[STD]

measuring settling time

Any respone is appreciated!

 

[guanchoon]

settling time in synthesizers

Hi. Rohde&Schwarz has an application note

"Measuring frequency Settling time for synthesizers and transmitter"

Just go to R&S website, search under application note section 8)

 

[tlihu]

measure settling time phase lock loop

Hi. Rohde&Schwarz has an application note

"Measuring frequency Settling time for synthesizers and transmitter"

Just go to R&S website, search under application note section 8)

Here comes the link

hxxp://w*w.rohde-schwarz.com/www/appnotes_files.nsf/ANFileByANNoForInternet/B793E3A7914BA993C1256B280045851C/$file/1ma15_0e.pdf

 

[rfice]

you can derect test the lpf voltage,using low couple.and than make swich the pll frequency.
Just this.

Also using the pll test suit from agilent.

 

[uncle_urfi]

If it is a synthesizer, then you switch it between divider ratios, N1 and N2 and monitor the Vcont voltage (in case you don't have a frequency scope)

If you have a frequency scope, you can connect the VCO output directly to it.

If it is a PLL, then you provide some disturbance at the input and use the frequency scope to find the settling time.

BTW, a frequency scope is nothing but a modulation domain analyzer

53310A Modulation Domain Analyzer (Search on Agilent's website)
www.agilent.com

 

[Rose_straw]

If It is a synthesizer and you want to see the settling time and you don't have access to any time domain analyzer; but have a stablized signal generator and a mixer(Mini Circuit has a variety of compact models that you can use them), a function generator, and an oscilloscoe, there is a way to see the settling time. You can mix your signal, which hops, with a stable signal from the signal generator and see the variation of DC in oscilloscope.


1-With a function generator try to make a square wave ( the duration should be longer than the settling time you calculated ). This is a command line. Switch between two frequencies using this squre wave. For example, if you are switching the MSB by this squre wave, your synthesizer jumps between the highest and the lowest frequency. ( you might have other ways to switch you signal)

2-Adjust the out put of your signal generator on your highest frequency.

3- Mix the hoping signal and the stable signal generator's output.

4-See the settling time as a signal near the swiching time of function generator in your oscilloscope.

Cheers,
Rose

 

[goodboy_pl]

refer to "Phase-Locked Loops Design, Simulation and applicatins" written by Roland E.Best for PLL measurment methods.

BEST!

 

[lguancho]

Check out the PLL application note from National Semiconductor

 

[cherrytart]

if you could plot current into versus voltage across the capacitor at the VCO input it might indicate how quick the PLL is settling. I suspect it would look like one of those Lorentz fractals, orbiting closer, ideally reaching a steady state

 

[buta]

Rose_straw suggested a traditional method to check the settle time. I used this method when the freq domain analyzer was unavailable.