How to measure digital PLL parameters

[jnaneshm]

Hi,

I am doing a project on ADPLL(all digital PLL). I have written VHDL code and synthesized it on FPGA but i need to know whether it is possible to measure parameters like jitter etc for an all digital PLL. If so, how can it be done?

 

[mrflibble]

option 1: Same as you would any other PLL. Do measurements on the actual hardware.

option 2: do a timing simulation, write all the useful signals to an output file, and process with your favorite numerical tools. As far as I know, simulators don't simulate a jittery clock input. If you need that in your analysis, then I guess you'd have to add some random jitter to the clock source yourself.

 

[mrflibble]

Also, see the attachment in this thread:

https://www.edaboard.com/threads/210612/

 

[jnaneshm]

Thanks for the suggestion, sir .

I tried option1 using a CRO but could not observe the output properly due to the high frequencies involved. So, i used a logic analyzer. However it shows only the steady state output(locked state of PLL) and the observed waveform is exactly similar to what was observed during simulation, i.e could not observe any jitter.
Does that mean the design is jitter free?

To carry out option2 as you said i have to add some random jitter to the clock source myself. But i do not know how to do it. Can you please give me some links where info in this regard can be found?

 

[mrflibble]

To carry out option2 as you said i have to add some random jitter to the clock source myself. But i do not know how to do it. Can you please give me some links where info in this regard can be found?

Well, that would be fairly easy...

A quick example would be to do in your testbench:

real Tclk = 4.000; // 4 ns clock

always begin
    # ((Tclk/2) + random_stuff)    clk <= (~clk);
end

Where random_stuff is a function you can define yourself. You can use the $random verilog function as an basic ingredient...

---------- Post added at 17:17 ---------- Previous post was at 17:15 ----------

The harder part would be to construct something that spits out a clock with known statistical properties. Of course, measuring the generated clock and then calculating the statistics is a lot easier.