[SOLVED] How to make a x10 frequency multiplier?

[desmond1310]

Hi,

I'm currently trying out this circuit https://www.pira.cz/enpll.htm

I'm from Malaysia, totally new to designing circuits, and i'm kinda short of time.

Is there a quick way for me to design a frequency multiplier than can multiply an input 9MHz to output 90MHz? (both should be square waves).

From what i understand from digital tuning, i should input large enough signal (let's say 90MHz) so that it matches the set frequency by the DIP switch (which is also 90MHz), and it should output an output voltage for each set frequency.. is that it?

Which is why i'm thinking that to make a multiplier, as my campus' function generator has only the max output of 12MHz. I am welcoming any inputs from anyone to get a good result.

Thank you!

 

[karesz]

Hi,
1, I think not that your multiplying idea is the best-sorry...
2, for radio tuning/measurements you need in practice a Sinus signal, modulated in frequency (FM, or 88-108MHz) or Amplitude modulated (AM, 0.5--32MHz)...
Otherwise is in your country surly some functional FM transmitter, & you can know/ask for that frequency, then they are your "calibrating" signal because you can not have a dedicated signal generator... https://en.wikipedia.org/wiki/Signal_generator
https://en.wikipedia.org/wiki/Frequency_modulation
Good luck!
K.

 

[desmond1310]

Hi karesz, thanks for the reply.

I don't quite understand what you have explained. can you make it clearer? Sorry.

 

[karesz]

You see, you will build a FM radio_am I right?
For measuring on that you wish to use your campus pulse generator, it has square output and (I assume) no frequency modulation, & output level of 0.1---10Von 50 Ohm!
For driving an HF -FM receiver you need a sinus signal generator & Frequency modulated
pls read the attached wikipedia side!
To next, another question, that a pulse generator(your campus thing) has toooo much amplitude!
Receivers needs generator/input signal up to max in mV--10th of mV!, but better less as 1mV...
Also you must have special generator, even: called (AM)/FM "signal generator".
K.

 

[desmond1310]

Oh, wait, i think i do get it now. Because our country has FM radio stations transmitting at 93MHz, 94MHz, so and so. Can we actually use that as our input? Meaning we make a simple FM receiver, so that the signal gotten will be fed into our PLL digital tuning? Is this way possible?

 

[FvM]

Nothing has been said in your post that motivates the usage of a frequency multiplying PLL, except that your lab generator
has a limited frequency range. Building a simple variable square wave generator would be much easier in any case. If you have
additional requirements for exact frequency multiplication, you didn't tell them yet. The above posted SAA1057 circuit doesn't
help for the said problem at all. Digital PLL circuits for the specified frequency range are e.g. made by Texas Instruments, they
have to be supplemented with an external frequency divider to set the multiplication factor. Because the VCO frequency
range is always limited, you should tell the intended range. Or is it exactly 90 MHz?

edaboard rules clearly tell, that you should not post the same question in multiple threads, by the way. Usually cross post are deleted by a moderator.

 

[desmond1310]

I'm sorry FvM for the cross posting. I thought I was in the wrong thread.

Generally, I do not know how the PLL digital tuning works. It appears to look like a simple application of PLL to us, which is why we chose it as our application.

Our assignment's details are:

DESIGN AND BUILD A PHASE-LOCKED LOOP FREQUENCY SYNTHESIZER

The objective of this group assignment is to design and build a phase-locked loop (PLL) frequency synthesizer using a PLL integrated circuit (IC) such as 74HC4046. The minimum required synthesizer’s specifications are as follows.

Frequency range: up to 10 MHz or better
Output voltage range: 0 to 5 V

We are also asked to make an application of this pll frequency synthesizer.. which is why we are here now with this circuit from pira.cz.

I'm sorry for lacking in knowledge and would appreciate any useful inputs to solve this problem. I'm trying my best to understand your replies here too.

 

[FvM]

I wanted to know the problem background, which has been clarified now. Standard 74HC4046 has a frequency range
up to 12 MHz, faster 74HC4046A up to 18 MHz. The moderate frequency range makes the design rather easy, although all
basic questions of PLL design, e.g loop filter dimensioning, can be investigated. For 90 MHz, special high frequency components,
e.g. TI TLC2933 would be required. The above mentioned SAA1057 receiver PLL chip is rather special, and in my opinion not well
suited for a general PLL project. It needs e.g. an external VCO oscillator. If you think, that designing a PLL receiver would be
an interesting challenge, you should look at the detail problems involved with it and also ask your instructor, if he's
motivated to support it.