Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I have problem to make a hierarchial of my source code in Synopsys after create a source code in Xilinx. What command or syntax and how to do it. Somebody help me?
Synopsys is a company that makes a lot of products, so please refer to the specific tool that you want help with. I believe you are refering to using VCS based on another thead that I tried to help you with.
use: vcs -F srcfiles
where srcfiles is a file that contains the path to each of the files that you want to compile.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.