How to interface SPI EEPROM 93c56 with SPARTAN II FPGA?

[siki_23]

Hi
I want to interface SPI EEPROM 93c56 with SPARTAN II FPGA.How to interface the SPI and to read the data what maximum frequency shall i use.

Did i need to provide the opcodes in rising edge and data in Falling edge

Give me suggestions

 

[IanP]

Re: SPI interfacing

Check with device data sheet for maximum clock frequency (SK pin). Some devices can work with 1MHz, some others with 2MHz ..
This frequency also depends on the supply voltage: for 5V -2MHz, for 2.7V -1MHz and for 1.8V -0.25Mhz

All input information (DI) to the device is latched on the rising edge of this clock input, while output data (DO) from the device is driven from the rising edge of this clock input.

For more info explore 93C56's data sheet:
**broken link removed**
Regards,
IanP

 

[sam31]

Re: SPI interfacing

:idea: From 93c56 datasheet:
:arrow:Max frequency : 250 Khz
:arrow:FPGA generate data output on the falling edge (for opcode or data)
:arrow:FPGA sample data on rising edge