how to inprove morte carlo simulation for commone mode gain?

[chichi]

how to improve morte carlo simulation

i am designing a fully differential amplifier with cmfb circuits,my single run simulation for both DM and CM works fine,achieve a DM gain of 108 dB and CM gain -180 dB,but whenever i run a morte carlo simulation,setting the model library tro cmosmc,the DM gain can vary to 75 DB,and CM gain vary from -50DB to even 10dB,which looks a mass,i think my bias and cmfb seems already fine,but what can i do to improve that morte carlo simulation?besides,i used cadance ,i used to change model library to cmostm,technically,shouldn´t the result of be like the same line?but my cmostm simulation results also varies somehow..can anybody answer me?i am desperate about this master thesis design...
thanks a lot:|

 

[dick_freebird]

Try MC options to separate process sensitivity from
mismatch sensitivity and see what is really driving the
poor-result iterations.

Are you able to "return to the scene of the crime" by
applying the MC seed / iteration of identified bad ones?
We used to be able to do this but not sure how badly
Cadence obscures the mechanism, anymore.

You may have to "instrument up" the design to pick
off clues if you cannot set up "Iteration #42" to do a
deeper probing of misbehavior.

 

[chichi]

Re: how to inprove morte carlo simulation for commone mode g

thanks a lot for ur reply,i now see the problem ,which lies in process ,but not mismatch..i chose only mismatch for a monte carlo simulation,then the result seems much better..i am just designing the opamp circuits,should it be ok if i neglcet the process variation?

Added after 8 minutes:

maybe another question,i runhe monte carlo simulation for both DM gain,CM gain,but how to determine the CMRR from so much simulation lines,should i pick up the minimum view?and for the PSRR ,i just use XF run for the vdd supply,is the XF run VOUT(plot in 20db) then be my PSRR ?again,what value should i pick up from various monte carlo simulation?

 

[JoannesPaulus]

if you guarantee that the foundry will give you all nominal parts, sure go ahead... I recommend you design for all process, temperature and voltage ranges variations... or you will have some ugly surprises!

 

[dick_freebird]

At least now that you know which angle it is coming
from, you can proceed to find the sensitivities (VT?
VT skew N vs P? Resistor? etc.) and try to knock them
down. Probably a corners tool job, but since it's a
process deal you can also place "test" devices of all
used elements and use the calculator to do scatter
plots of output attributes (e.g. VCM position) vs the
devices OP and MP results. That is a good way to
eyeball for the relevant actors.