Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

how to increase the P1dB to -10dBm with 24dB gain of LNA

Status
Not open for further replies.

plike8846

Newbie level 5
Joined
Aug 31, 2005
Messages
10
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,365
p1db lna

now ,i am design a single LNA , the spec is G=24db, the p1dB is -10dbm, but i can only achieve the gain is 23, the P1dB is -18, i use a 2stage cascode structure , can anybody tell me how can i achieve the spec goal,
thanks!
 

p1db lna increase

Without having full information about your design I can only recommend increasing the voltage and/or current for your amplifier. If this is impossible, or you want to optimize your deign, please provide more information about the circuit.
 

lna p1db

supply is 3V,the gain is 24dB, P1db is -12dBm, the structure is 2stage,the load is inductor , each stage is cascode ,the current is about 5mA,when i increase the P1dB, the gain decrease , now the only problem is how to increase P1dB, the design is similiar to maxim2659

Added after 3 minutes:

now the op1dB is 4.8dBm, the p1dB is -18dbm, i think if increase the output power can increase the p1dB, increase the Vod has little effect
 

lna p1db

What is the frequency band? For frequency band below 1GHz all your spec can be easily done with just one transistor. You are talking about two stages and each is cascode. It looks like over killing. Do you have S-parameter file for your transistors and what are they? What is required NF? Without all information it is hard to help you. If you do not want to openly disclose all the details, but can do it privately, you may send the data to my pm.
 

p1db op1db

sorry , i am a fresher ,the freq is 1.5G ,nf is about 0.8dB,use tsmc0.18 process , what is the sp parameter of transistor, just i see a paper ,it is a single stage ,his power gain is 24dB, p1dB is -13dBm,between the transistor of gm and cascode there is a inductor for interstage matching.the power disspitation can a little larger.
 

p1db gps lna

It looks like LNA for GPS. I am not RFIC designer, so I cannot help you with IC based LNA design, my area is lumped elements circuits. But your spec is not very unusual and I think it is not hard to achieve these parameters.
 

to increase the 1 dB of the Amp u need to use a larger device , which to support higher current and hence higher output power

inductor degeneration is very good to linearize the device and increase the 1 dB compression point but it will sure decrease the gain

Khouly
 

I Think khouly is right from IC design point of view. But Increasing the current through device will increase the noise as a square of current. It is is not good for LNA.
 

Do u use any means of interstage matching?
--pap
 

i have try interstage matching between transconductor transistor and cascode transistor with a inductor ,but still acheive the goal, i think maybe 2stage cant make it because the first stage have gain .
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top