How to improve LDO's transient response?

[mark_nctu]

transient response of ldo

Maybe you need a large external Capacitor to imrpove tansient response!

 

[pugongying]

transient responese of ldo

Thanks to all of you,some suggestions really inspired me,and I finally confirmed that the main reason for large overshoot and undershoot is due to small capacitor, not phase margin or some other things.
So,if I want to design an LDO for RF applications,off-chip large capacitor is really needed for better transient response.

 

[elantra]

improve transient response of ldo

LDO for RF circuit, the external cap may be a must, you know, without the cap, the psrr would be quite bad. this is important.

 

[krishnareddy]

ldo load transient

providing a short burst of current pulse to the pass transistor gate can improve the speed of transient response

 

[devop]

dc power source undershoot improve

LDO for RF circuit, the external cap may be a must, you know, without the cap, the psrr would be quite bad. this is important.

I just want to design a capless ldo for a 100M rf circuit,vout=2.5 Imax=30mA
but I have no idea about the spec srr,max overshot,load and line variations,output noise .etc
can anyone give me some opinion??

 

[sudheer_vlsi]

ldo response to load transients

improve the PM of ur loop.it will halp in reducing the overshoot and under shoot.

 

[arghpok]

transient responce

100 MHz is in the most critical frequency band for PSRR if u r trying to make an offchip design. If u r using ext-cap (e.g. 1uF), This frequency wont be a big deal, since the cap will operate as a wire at this frequency and beyond. The under/overshoot problem is due to the gate capacitance charge/discharge issue. It is needed to increase the sink/source current at this node when the transients occurs, so the circuit operates only with the feedback latency and not with the Cpar's slewing. Unfortunately, this cannot be achieved ezly (as u may be thinking).

 

[jt_rf]

sourcing sinking ldo

The biggest problem with CAPLESS LDO is the transient response! the easiest way to solve it is by increasing the Iq. The BW of the error amplifier should be very large. Otherwise you have to introduce some kind of fast tranisent loop to combat the transient load regulation problem.

The large voltage spike at the output is because of slew-rate problem at the gate of the Pass element!!!

 

[ckseu]

transient response ldo

I think it is not strange that big overshot occured that without a big output capacitance if no special method used
I meet the sample questions also
Can any one give us a solution?

 

[jt_rf]

buffer stage for fast response ldo

you hav to use a fast transient loop for the transient load regulation. this is one solution. other one is to increase the b/w of the Err amp. (if the load current is < 10mA, then increasing Iq would not be acceptable.

try out the "Milliken" method for fast transient loop.

 

[jonneylu]

you may consider some spec such as slew,bw etc

 

[leo_o2]

It depends on your applications. BW can vary from 10KHz to 100MHz. Of course, high BW is always better. For general CMOS process, several MegHz will be the upper limiter.

 

[survivor]

May someone provide papers or methods about fast transient loop?

 

[ryanbowen]

it's OK
u can increase the cap for less settle time
capacitor-less not means no cap but not large cap output

 

[jugemu1234]

Hi guys here,

Cap-free or cap-less LDO also brings problem with start-up|power-up additionally to other trainsient deals discussed here. Does anyone have simillar problems ? and how was it solved? Stability and faster transient response were managable somehow but this start-up issue now bugs me much. Even if you see 90 deg or more PM, it gives oscillation on start-up.

Thanks,