Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to improve delay time when you have a long metal wire?

Status
Not open for further replies.

ilter

Member level 4
Joined
Jul 22, 2005
Messages
77
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
2,095
Dear all,
If I have a long metal wire,I will consider delay time question.
Maybe I will add inverter to improve delay time.
Besides this method, does everyone have anothor method?
Thanks.
 

Re: wire quesiton

You need to specify the goals you want to meet. It looks like you want to minimize the effects of the delay of signals through your wire.

Adding extra circuitry will only increase the delay.

If your problem is the delay through one path compared to other paths, then one common solution is to add an equal delay to the other paths.
 

Re: wire quesiton

flatulent said:
You need to specify the goals you want to meet. It looks like you want to minimize the effects of the delay of signals through your wire.

Adding extra circuitry will only increase the delay.


If your problem is the delay through one path compared to other paths, then one common solution is to add an equal delay to the other paths.
My goal is my metal line is control that transmission gate.
But it may be too longer.Adding extra circuitry will only increase the delay.
I have another question. Can inverter chain not a method?
How do I add an equal delay to the other paths?
Thanks.
 

Re: wire quesiton

will adding a buffer do?
 

wire quesiton

A universal method of removing skew from clocks is the use of a Delay-Locked Loop, but in your case, it will be overkill.

If it is just a wire we are talking about, you can minimize the delay by
1) careful placement of the blocks generating the signals.
2) Using an extra buffer
3) Using a transmission gate(s)(always enabled) to add more delays to the other signal.
4) Using a differential cell on the 'main' signal and generating two local signals that are 180 deg apart and using these to control the transmission gate.

Hope it helps.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top