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How to implement the parallel/multiplexed IO ports of mc8051(oregano IP)?

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irun2

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Has anyone done this before?
I've read the through mc8051_ug.pdf and found the basic structure of the IO port showed as attachment.
What confuses me is that the clock signals to that two DFF, if the mc8051 ip has provided them, I don't know where they are in the source codes.
Any help will be very appreciated! Thanks in advance
 

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