How to implement MII on FPGA?

[freewilly30]

mii interface

hi all
i am designing an ethernet switch
the first step is a phy ic ,( we will use one from micrell company) ks8721B
the output from that ic supports something called mi
anyone has any details on miii and how could it be implemented on fpga?

 

[dolby.yang]

mii interface timing

this is a simple question.for this interface,you shoude read your phy's datasheet and 802.3 protocol to get this interface's signals and timing,after you do this work,
i think u will implement it.

 

[eeeraghu]

how mii interface works

If u r going to the ethernet u need to go according the OSI layers, the PHY layer is OK i.e mii, but what about the Data link layer, do u need to interface data link layer and the phy layer or else wishbone bus to the phy layer(this is not a good one) ?

 

[Big Boy]

Re: mii interface

Best is to use a already-made core, like one provided at opencores.org. This have Wishbone interface, which is relatively simple, and well documented. More info in your other thread...