How to implement data framing?

[yinni]

Hi,everyone:
My data source are continously sampled at 32 MHz,and a header is generated at fixed intervals which consists of synchronous word,count,etc.Now I have to generate frames whenever another new 2500 data words are sampled. The output should be back-to-back frame words.
The question is I don't know how to insert the headers.What should I do to guanrantee that the data fifo won't overflow?What about the relation between the data sample clock and output clock?
Would anybody who have the experience of package framing give me some advice?And it's better if you show me some reference design in vhdl.
Thanks a lot!

 

[bpu]

What should I do to guanrantee that the data fifo won't overflow?

if your fifo is overflowed, increase the number of words in fifo

What about the relation between the data sample clock and output clock?

no relation, you can use the different clocks.