OhJ
Newbie level 3
hello,
can someone please help me with the basic explanation (1, 2, 3) / functionlity of how a DAC can be implemented in VHDL. Ive read so much info on the internet, im now confused. j Im wondering why things are being done differently.
My question is with regards to using a look-up table.
1) what determines the boundaries of the lookup table.
2) how do I calculate the steps based on the lookup table,
etc..
pls assist
regards
OhJ
can someone please help me with the basic explanation (1, 2, 3) / functionlity of how a DAC can be implemented in VHDL. Ive read so much info on the internet, im now confused. j Im wondering why things are being done differently.
My question is with regards to using a look-up table.
1) what determines the boundaries of the lookup table.
2) how do I calculate the steps based on the lookup table,
etc..
pls assist
regards
OhJ