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How to get the rise energy and fall energy

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red_0220

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Hi all,
I plan to calculate a inverter internal power.
I can know the internal energy equation by primepower manual.
(Internal power = rise_energy + fall_energy)
How to know the rise_energy and fall_energy data?
I need to create a cell library.
 

______ ______
/ \_______/ \
<--------><---------->
calculate vdd*i(vdd) and integrate it over positive cycle of output until the point where it starts falling for rise_energy.
 

    red_0220

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sudheerprasad said:
______ ______
/ \_______/ \
<--------><---------->
calculate vdd*i(vdd) and integrate it over positive cycle of output until the point where it starts falling for rise_energy.



Vout __/一一一\_______/一一\__/
...........<-rise->.<-fall->

so vdd*i(vdd) and integrate it over negative cycle of output until the point where it starts rising for fall_energy (no include posedge and negedge)?
 

red_0220 said:
Hi all,
I plan to calculate a inverter internal power.
I can know the internal energy equation by primepower manual.
(Internal power = rise_energy + fall_energy)
How to know the rise_energy and fall_energy data?
I need to create a cell library.

hi...
just curious but what is a cell library???
 

I m also interest about that library cell!?
 

cell library

cell library consists of combinational and sequential cells,like and ,nand ,dff etc,
each cell is characterised and the prop delay,rise/fall times ,power for diiferent i/p slope and o/p caps
are calculated .
cell library is used in synthesis tools like synopsys design compiler where a RTL code is synthesized to gatelevel code verified ,and when placement and routing is done cell libraries are again.
the better the cell library ,the better is the chip regarding area,power,performance.
there fore cell libraries are important and great effort goes to get a good cell library
 

Re: cell library

sudheerprasad said:
cell library consists of combinational and sequential cells,like and ,nand ,dff etc,
each cell is characterised and the prop delay,rise/fall times ,power for diiferent i/p slope and o/p caps
are calculated .
cell library is used in synthesis tools like synopsys design compiler where a RTL code is synthesized to gatelevel code verified ,and when placement and routing is done cell libraries are again.
the better the cell library ,the better is the chip regarding area,power,performance.
there fore cell libraries are important and great effort goes to get a good cell library

great information sudheer!!!! thank you very much
 

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