how to get the gate count info from synthesis result

[johnli100]

i just finished the initial synthesis for a CPU subsystem, and i got an area report. from the report, how can get the basic gate-count info?

can someone give a detail explaint. Thank alot!

 

[vsrpkumar]

If u r xilinx ISE ,see map report.U can see gate count.
Generally
Gate count is repoerted in terms of nand gates.
The FF consists of 4 nand gates
inverter half nand gates
remaining all represent in terms of nand gates
All this in terms of asic gates

 

[kermit]

If you synthesis with a standcell library, you can find the report about the area, then you find the area of NANDX1(drive strength is 1, NAND gate), the last thing you have to do is use the full chip area dived NANDX1 area, you can get the gatecount of you design.

 

[silencer3]

after synthesis, u get CELL AREA. divide the CELL AREA by the area of NANDX1 (basic NAND gate in ur library), then u get the GATE COUNT for your design.

 

[spauls]

Check the cell area of 2x1 NAND gate ,
there are lot of scripts avilable in solvnet.