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How to get started with 8051 derivative SoC & C programm
- Thread starter czpir
- Start date
- Status
waterman
Member level 5
Re: i/o
It sounds like that you are trying to use memory-mapped IO technique
for external registers (not SFR) to control your chip. This method
is used widely for 8051 derivatives, such as monitor controllers.
It is because the standard 8051 ICE with vendor's special adaptor
could be used for debugging.
For application of this kind, you could use PBYTE[] or XBYTE[]
(I suppose you are using K_e_i_l C51 compiler) to access external
registers and control your chips. For more detail, check user's
manual of the compiler you use.
Hope this help!
It sounds like that you are trying to use memory-mapped IO technique
for external registers (not SFR) to control your chip. This method
is used widely for 8051 derivatives, such as monitor controllers.
It is because the standard 8051 ICE with vendor's special adaptor
could be used for debugging.
For application of this kind, you could use PBYTE[] or XBYTE[]
(I suppose you are using K_e_i_l C51 compiler) to access external
registers and control your chips. For more detail, check user's
manual of the compiler you use.
Hope this help!
czpir
Member level 3
I/O
Dear Waterman
Thanks !
Yes this is what I am trying to do. I will look at the manuals.
Please let me know if memory mapped I/O would require additional components to be used for address decoding ? like a 7XX374 or something else or can I connect the Memory device straight ?
Further can I make use of any 8051 port for memory mapped I/O or should I depend on port A port B ?
Dear Waterman
Thanks !
Yes this is what I am trying to do. I will look at the manuals.
Please let me know if memory mapped I/O would require additional components to be used for address decoding ? like a 7XX374 or something else or can I connect the Memory device straight ?
Further can I make use of any 8051 port for memory mapped I/O or should I depend on port A port B ?
waterman
Member level 5
Re: I/O
It depends.
Recently, I used a chip with only 7 external registers.
I mapped these registers to 0xxxh, 1xxxh, 2xxxh, ~ 6xxxh.
That is I used XBYTE[0x0000], XBYTE[0x1000],... to have access
to this chip. So I did not put 373 on the board. However, not all
applications could use this scheme. Also remember to connect /WR and /RD to your chip for write and read.
8051 <--> my chip
===============
A8 <--> A0
A9 <--> A1
A10 <--> A2
D[7..0] <--> D[7..0]
/WR <--> /WR
/RD <--> /RD
Maybe you need a 373 to latch A0~A7 (8051 shares these pins for
data and address).
It depends.
Recently, I used a chip with only 7 external registers.
I mapped these registers to 0xxxh, 1xxxh, 2xxxh, ~ 6xxxh.
That is I used XBYTE[0x0000], XBYTE[0x1000],... to have access
to this chip. So I did not put 373 on the board. However, not all
applications could use this scheme. Also remember to connect /WR and /RD to your chip for write and read.
8051 <--> my chip
===============
A8 <--> A0
A9 <--> A1
A10 <--> A2
D[7..0] <--> D[7..0]
/WR <--> /WR
/RD <--> /RD
Maybe you need a 373 to latch A0~A7 (8051 shares these pins for
data and address).
clockskew
Newbie level 1
Re: I/O
Dear Waterman :lol:
Pobably i can help you ...Start designing from basics(the kind of I/o you have on the 8051 or its peripheral and the kind of memory you wanna interface.
work out the pin configuration and the memory details and then definitely u wil be able to understand how many latches(definitely one for add and data) u need if u wanna multiplex the pins and use them.
Regds..
Dear Waterman :lol:
Pobably i can help you ...Start designing from basics(the kind of I/o you have on the 8051 or its peripheral and the kind of memory you wanna interface.
work out the pin configuration and the memory details and then definitely u wil be able to understand how many latches(definitely one for add and data) u need if u wanna multiplex the pins and use them.
Regds..
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