Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

how to get DNL and InL using Verilog-A in Cadence

Status
Not open for further replies.

q0w1e2r3

Junior Member level 1
Joined
Jul 8, 2006
Messages
19
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,388
I finished a 10bit--20Mhz Pipeline ADC,but i don't know how to measure the DNL and INL .I want to use Verylog-A.Can anyone give me some ideas in details.For example one step,two step.....waht's "vtran=..."mean?Thanks!
 

vtran is transient voltage
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top