how to generate this clock waveform with PLL

taofeng said:

Hi,
I want to generate N clock cycles with T+ deltaT , then N clock cycles with T+2*deltaT, then N clock cycles with T+3*deltaT,..... and then go back, N cycles with T-deltaT, T-2*deltaT , T-3*deltaT. Please see the attached for details.

thanks,


jef

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FvM said:

Cause the waveform has 5 discrete levels, it involves at least a 3 bit output signal. It can be easily generated by a 3 bit counter and digital logic. You also need some kind of a 3-Bit-DAC, e.g. a resistor network or weighted current sources.

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AdvaRes said:

taofeng said:

Hi,
I want to generate N clock cycles with T+ deltaT , then N clock cycles with T+2*deltaT, then N clock cycles with T+3*deltaT,..... and then go back, N cycles with T-deltaT, T-2*deltaT , T-3*deltaT. Please see the attached for details.

thanks,


jef

Click to expand...

Hi taofeng,
is T+deltaT a voltage, a current or what ?

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AdvaRes said:

FvM said:

Cause the waveform has 5 discrete levels, it involves at least a 3 bit output signal. It can be easily generated by a 3 bit counter and digital logic. You also need some kind of a 3-Bit-DAC, e.g. a resistor network or weighted current sources.

Click to expand...

@taofeng
Are you designing a DPLL ?

Nice idea FvM.
I would think to use a N (or N/2) counter ,a 3 bit counter an appropriate encoder for the retur and a DAC.

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taofeng said:

I want different clock frequencies, not the voltage ! thanks

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