how to generate a checker for asynchronous fifo

[sai685]

i want to know whether the below condition are checkers or not?
1. while(empty) but it is showing (full)
2. while(full) but it is showing (empty).
3.if the expected result is not equal to produced result.
then display error.

if these are checker just tell me some hints to write the code for this.

 

[wtr]

You can use a vendor FIFO ip block.

The instantiated component will tell you what signals to connect up.

The fifo cannot be empty and full at the same time.

What you know is if you are not full then you can still write data.
What you know is if you are not empty then you can still read data.

Can you expand on what you are actually trying to achieve

 

[sai685]

what i am trying is like just to generate checkers for asynchronous fifo. Can you tell me whether the below codes are checkers for fifo or not

always@(posedge wr_clk or posedge rd_clk)
    begin
  if(rd_empty && wr_full)
    begin
   $display("error");
    end
    end
 
 always@(posedge wr_clk or posedge rd_clk)
    begin
      if(que.size!=1 )
       force rd_empty=1;
      if(que.size!=32 )
     force   rd_empty=1;
      
    end
  always @(posedge wr_clk)
    begin
      if(write_enable && wr_full)
        begin
          $display("error");
        end
    end
  always @(posedge rd_clk)
    begin
      if(read_enable && rd_empty)
        begin
          $display("error");
        end
    end