makanaky
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Hi,
I am using RTL compiler to synthesize a critical path of MUXs, and the tool implements the MUX using gates (NAND, OR ... etc). I am afraid this may increase the path delay while the std cell library contains MUX cells. Is there a way to instruct the tool to use a std cell MUX instead of gates ?
I am using RTL compiler to synthesize a critical path of MUXs, and the tool implements the MUX using gates (NAND, OR ... etc). I am afraid this may increase the path delay while the std cell library contains MUX cells. Is there a way to instruct the tool to use a std cell MUX instead of gates ?