Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to fix this problem of SC CMFB

Status
Not open for further replies.

benchen

Member level 2
Joined
Sep 9, 2005
Messages
42
Helped
2
Reputation
4
Reaction score
0
Trophy points
1,286
Activity points
1,605
I designed a folded fully differential amp with sc cmfb used in pipeline. When the clock freq is low, like 1M, this amp can get a Av about 10K. But when the freq is up to 40M, the Av is only 400. I did this simulation in spectrel using pss and pac ananlysis. Is it a problem of sc cmfb or the amp itself?
I try to reduce the capacitance value in the sc cmfb, I found the result is better but the Av is still much lower than that with the ideal cmfb. How to fix this problem? what is the freq limit of the sc cmfb?
thanks
 

You should have the op-amp spec according to your pipeline stage.

It is inevitable to have speed degradation when you use real CMFB (especially SC CMFB) instead of ideal CMFB unless you have already considered the increase of capacitive loading due to the real CMFB. You can optimize the capacitor size considering noise and speed. Your op-amps CMFB speed also depends on the CMFB loop input gm.

I've designed over hundreds MHz BW (over GHz unity-gain bandwidth) op-amp without limitation of the SC-CMFB. I think, there is no freq limit of sc-cmfb. If you use the CMFB in continuous type, the sc-cmfb clock should be much faster than your-op-amps BW. If you use it in SC application, you can just use the same clock rate.

Good luck
 

Thanks for your reply.
What is value of the capacitance in your sc-cmfb? In my current design the capcitance are 300fF and 150fF, is that ok?

when the sc-cmfb clock freq is below 1M, the sc-cmfb can wokr well ,but with the clock freq increasing ,the Av of the amp is decreasing fastly. Is it the problem of the sc-cmfb? I have done the tran simulation. The correct common mode voltage can be established when sc-cmfb clock frea reached 40M, but the ac analysis showed the av of the amp is poor, why would this happen?

what is the difference between the continuous application and SC application for sc-cmfb? Can you explain that for me?
 

oh, I have come across the same question
 

Hi,benchen:

I have designed a fully op-amp with sc-cmfb,and I come across the same problem.In my opinion,wo have not found the proper method for simulation.There may be something setted wrong when wo do simulation.

But how to fix the problem?
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top