Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
You can do it crudely with a triangle wave input
in transient analysis but that tends to not be
super-DC-accurate re Vio. The ramp time
through the linear region needs to be >> prop
delay @ low overdrive.
A classical op amp test loop can be used to
measure comparator offset provided that
the TPLH, TPHL are roughly symmetric and
Vio(rising), Vio(falling) are similarly responsive
to ground noise (not such a good bet, but
possibly "close enough" if the board is clean)
and the aux amp integrator does a good job
of filtering the output chatter into a clean
DC feedback signal. You can do the same in
transient analysis. But still transient solution
accuracy is inferior to DC solution, at least
by default tolerance settings.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
