I think I have over complicated this topic. Thanks to all who helped me here.
I have just googled and found out all the different ways in stackoverflow website (using VHDL). Just pasting them here for boarders reference.
Method1:
if (A mod 2) = 0 then
-- it's even
else
-- it's odd
end if;
Method2:
if (A(0)) then
-- it's odd
else
-- it's even
Method3:
function is_even(val : integer) return boolean is
begin
return val mod 2 = 0;
end;
Method4:
function is_even(val : integer) return boolean is
constant vec: signed(31 downto 0) := to_signed(val, 32);
begin
return vec(0) = '0';
end;
I agree that Method1 and Method3 (similarly Method2 and Method4) are one and the same. But they are just two different coding styles.
But the one difference I think is, Method3 and Method4 are not synthesizable. Can someone please confirm this ?