Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

HOW TO find critical path

Status
Not open for further replies.

che_mie

Newbie level 3
Joined
Jan 23, 2006
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,355
how can i find critical path in complex circuit :?:
 

It is depend upon the circuit...

usually following signal comes in critical category..
Clock, High speed signal, small rise-time signal, A/D-D/A signals, OR-wired signal, AND-wired signal, Data and Address lines.

we cannot find critical signal...
we have to calculate the follwing paremeter to see the critical path of PCB.
strenght, fanout, noise and ground plane

pls refer SI blackmagic...
 

If you have datapath with a lot of multipliers/adders, they are critical path. Synthesis time report is always the best way to find out critical paths.
 

critical path is the delay between input and output or the maximum delay between two register of your system.
Critical path=1/ frequency
 

No critical path is not between two registers in the module but it is when the timing is not met between an input nd output of a particular module. Please do confirm it. It is with respect to the clock when it violates timing(setup and hold time) and is offcourse the longest path
 

In Design complier there is an option for highlighting critical path, expect the same will be present in other tools also. Not sure bcos i havent worked
 

still blur .... i'm doing design for adder multiplier ... so when it become complex ... i donno which of my branch is the longest path .. i need to know coz wanna use logical effort to resize it for minimum delay

Added after 1 minutes:

i ' m using tanner v11.. any help to find it using this tool ?
 

In my experence , you must first decide which path is a FALSE path , the synthesis and TA tools just do things you told to . If any false path was not specified , tools will spend much more time to optimize or analysis the false path and leave the REAL critical path aside . AFter you told tools where is the false path , tools will do very well in critical path optimization .
 

less propagation delay or more shortest path will critical path...

Added after 3 minutes:

che_mie said:
how can i find critical path in complex circuit :?:


less propagation delay or more shortest path will critical path...it can be easilly found b shortest path or dijisastra's algorithm
 

It is the longest path between two flops. We calculate the frequency of operation by measing the delay between two flops. So the longest delay between two flops in a circuits is the critical path as it supports the Setup time for the flops
 

By using static timing analysis tools, such as prime time, you could get the critical timing path from the timing reports.
 

Can anybody give me a suggetion what is the text books that has been used to find the complex ceitical path?
 

i think the best book for u is "Advanced asic chip synthesis using synopsys DC, PC & PT" by Himanshu Bhatnagar

If u read this, then u can definitely do what u r asking
 

I think the critical path is the longest timing path when your design have timing violations, and you can use synthesis tools to find it, for example, DC, PhyC, PT.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top