How to extract totall number of paths in a circuit?

[ebrahimi.khoy]

Hi,

I am searching for a fast method to find total number of paths in a circuit during synthesis.
I am using design compiler and until now the only solution that I have is to write all paths in a file using following command

report_timing -nworst HUGE_NUMBER > file.txt

and then use a "grep slack file.txt | wc -l" to extract the total number.

But it is too timing consuming for large circuits.

Any idea?

 

[oratie]

Try "report_constraint -max_delay"

 

[ebrahimi.khoy]

It doesn't provide any information about total number of paths.

****************************************
Report : constraint
-max_delay
Design : b01
Version: G-2012.06-SP4
Date : Fri Mar 22 11:57:28 2013
****************************************

Weighted
Group (max_delay/setup) Cost Weight Cost
-----------------------------------------------------
clk 0.00 1.00 0.00
default 0.00 1.00 0.00
-----------------------------------------------------
max_delay/setup 0.00


Constraint Cost
-----------------------------------------------------
max_delay/setup 0.00 (MET)

 

[soloktanjung]

How about report_net?

Thanks.

- - - Updated - - -

I'm sorry. it should be related to report_constraint as suggested by oratie.

Thanks.

 

[rca]

On soc-encontre, the timeDesign command report the number of path analyze.

 

[ebrahimi.khoy]

I don't use soc-encounter and none of previous command are working.