Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

how to extract the high freq signal out from the attached waveform?

Status
Not open for further replies.

arsenal

Full Member level 2
Joined
Oct 17, 2004
Messages
143
Helped
15
Reputation
30
Reaction score
4
Trophy points
1,298
Activity points
1,103
how can the high freq component signal shown in the attached pic be extracted to cmos output?

thanks
 

Attachments

  • coip.jpg
    coip.jpg
    9.3 KB · Views: 34

jasonc2

Full Member level 4
Joined
Jun 23, 2012
Messages
204
Helped
25
Reputation
52
Reaction score
25
Trophy points
1,328
Location
NYC, USA
Activity points
3,415
(Examples below use V1,V2,V3,V4 = -5,-3,+3,+5 respectively.)

If you know V1, V2, V3, and V4 you can use comparators and some logic:



Animated: https://tinyurl.com/co35sre

The gate logic could be done in software e.g. on a microcontroller instead, if necessary. Make sure to choose comparators with appropriate output levels for the gates / microcontroller / whatever.

If you don't know V1, V2, V3, and V4 but you know the ratio between them and you know they'll remain roughly consistent you can use a similar circuit with capacitors to track the upper and lower input signal limits feeding voltage dividers for inputs to the comparators.

In both of the above circuits if the input slew rate is too low you will still get erroneous output during transitions (e.g transitioning from V2 to V4 will cross V3) so you may still have to do some output filtering (e.g. cap at output of https://tinyurl.com/bsqla5c).

If you know the frequency of the inputs a buffer -> highpass filter -> comparator could do the job although might be a little trickier to set up:

Animation and circuit: https://tinyurl.com/c8lkj8p

You might throw a small cap at the output to absorb noise.

- - - Updated - - -

I specified a broken link for the second circuit. It is fixed now.

- - - Updated - - -

Example using capacitors to track signal range; resistors determine threshold ratios within range: https://tinyurl.com/c53x2ut (also has output filter -- cap at input is just to generate input with low slew rate and is not part of circuit).
 
Last edited:

crutschow

Advanced Member level 5
Joined
Feb 22, 2012
Messages
3,958
Helped
935
Reputation
1,868
Reaction score
938
Trophy points
1,393
Location
Colorado USA Zulu -7
Activity points
22,384
If the high frequency is a fixed frequency, you can run the signal through a band-pass filter and then output that to a comparator to convert it to a digital signal.
 

betwixt

Super Moderator
Staff member
Joined
Jul 4, 2009
Messages
15,198
Helped
4,955
Reputation
9,932
Reaction score
4,779
Trophy points
1,393
Location
Aberdyfi, West Wales, UK
Activity points
129,082
other methods:
1. use a PLL with lock-in range centered on the high frequency then gate it's output with the original signal.
2. sample the waveform and run a FFT analysis to find the dominant frequencies then recreate the desired one. This is a software solution but it will give both frequencies as it's result.

Brian.
 

arsenal

Full Member level 2
Joined
Oct 17, 2004
Messages
143
Helped
15
Reputation
30
Reaction score
4
Trophy points
1,298
Activity points
1,103
hi Jason,

That applet is good. Thanks a lot.

- - - Updated - - -

hi all,

Thanks a lot for your help.
Actually v1~v4 might droop due to attenuation and isi in long cables. The high speed can be several Gbps and the slow one can be as low as several Kbps while they are coupled together on driver and receiver ends working simultaneously in full duplex mode.
For Jason's circuit, how could I cope with the varying comparison levels which will later transfers to jitters in the receiver? Also additional replica path and synchronization must be applied to remove the logic glitches.
Crutschow, since the data patterns are random, the bpf might not help here.
Betwixt, they have different levels and a cdr might be needed here.

thanks,
arsenal
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top