How to exactly compensate a diode forward voltage drop

Vilius_Zalenas

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Hi,

I have a project involving a S&H peak detector. Since it is a peak detector, diodes are inevitable, but I want to preserve the linearity of the system as much as possible. I am planning to use a LF398 S&H amplifier with a diode prior to it. Is there any circuit to somehow compensate the voltage after the diode or somehow boost the signal by the vf? (Not pretty sure if its a thing, just making it up.) The point is I would like to somehow compensate the diode drop in an analog way. Any ideas, if such thing is possible? Thank you in advance.
 

We need to see a schematic to be sure but the way often used is to add a second diode of the same type and thermally bond it to the first one to ensure equal temperature. Then measure and mathematically subtract the voltage or using an analog adder, use the second diode voltage to offset the first one.

Brian.
 

Not sure what a "S&H peak detector" is. I know peak detector or S&H. Classical active peak detector compensates diode voltage drop.
 

I'm with FVM, I've heard of peak detectors and I've heard of S&H amplifiers, never heard of a "S&H peak detector".

Regardless, if the diode is inside the feedback look of an opamp, the voltage drop goes away. You can do an internet search of peak detectors, you know.
 

Perhaps it is a peak detector which "holds" after each new discovered
peak.

You might need to separate the two functions. Detect does not really
care about accuracy, only pulse-pulse consistency (and low droop)
while your sampling presumably wants accuracy.

So use a diode-pump plus comparator (maybe, or not, with some
effort at compensating diode drop) and a switch based track/hold?

You can only match Vf when you match If (or more properly the
current density, but other than "equal" (same P/N) you don't get
to know that). Anything approaching real accuracy wants an ideal
(-ish) switch.
 

Hi,

Do an internet search for "peak detector circuit" choose a document from a semiconductor manufacturer.
Finished.

Usually you will find semiconductor parts, datasheet, application notes, discussions ..... What else do you need?

Klaus
 

Rule #1 : Don't make implementation assumptions until you fully define the specs of your intended process.
Separate - Must Haves from Nice to Haves. Something can charge a cap when the input peak exceeds the output, or it may be bipolar without DC. These are common track & hold methods with reset after capturing the sample.
Rule#2 define your design with Must Have , cost, speed performance specs tolerances for temp, voltage, speed or BW, attack/decay times etc.

There are plenty of "ideal diode detectors" , for either positive or bipolar peaks. Then S&H is easy. It can also be defined by slew rates with attach and release times.

I have implemented simple peak/hold and decay circuits for AGC and implemented directly with a single NPN and PNP to eliminate the offset in a simple peak hold and decay circuit using RC+R ratios to buffer track fast and decay. Otherwise, you may choose a FET reset on hold voltage after taking a reading using a differentiated pulse on the read trailing edge or set by uC.
 

Precision rectifier made with op amp and diode at output. The diode drop is automatically cancelled. Load voltage is same as incoming voltage. The op amp may need a bipolar supply if you desire output as low as 0V.

 

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