how to eliminate eye diagrams jitter in real time testing?

[vcsel_driver]

hey anyone, done real time testing using evaluation board? how to ensure that the eye diagram's jitter is not caused by test setup?

i am testing a optical transmitter at 1.25gbps.

 

[nathan80]

Re: how to eliminate eye diagrams jitter in real time testin

well i guess you have not done your homework about jitter yet?

please read up on jitter? what is causing jitter? what is deterministic jitter? what is random jitter etc.

first of all you cannot eliminate jitter totally when you are performing real time testing. your job as a test engineer is not to eliminate the jitter caused by design or layout issues.
you just have to make sure minimum amount of jitter is caused by your test setup. steps to be taken:

i) choose the correct measurment wavelength for optical signals in your osciloscope or optical measurement device.
ii) clean all fiber cable heads with fiber cleaners before using. also clean the heads on the test equipment as well. make sure the fiber cable's are not bend when testing time.
iii) test the sma cables being used whether it is suitable for the frequency you are dealing with. some sma cables are meant for lower speeds. therefore change the cables if necessary.
iv) perform 'dark level calibration' on your osciloscope's optical measurement device each time before you perform optical testing. also calibrate the optical attenuators if it being used to zero level.
v) make sure you are using the correct TOSA with the correct slope efficiency.
vi) make sure all coupling between FC to TOSA , TOSA to EB, SMA to TE, FC to TE, SMA to EB are good. I have noticed that incorrect coupling can increase the jitter a lot. also minimize usage of adaptors.. it can also increase jitter
(FC = fiber cable , EB = evaluation board, TE = test equipment).

well the above are measures you can take while you are testing.

however the most important thing to consider is the evaluation board itself.
- pcb board must be designed according to its maximum operating speed
- the power supply filter must be able to filter all noise off the power supply. the voltage into the die must almost same as the voltage applied into the power supply filter.

actually there are more to reducing jitter. i just wrote down what i could remember.

 

[joe_chen]

Re: how to eliminate eye diagrams jitter in real time testin

but how to make sure the meas environment is clean

 

[krashkealoha]

Re: how to eliminate eye diagrams jitter in real time testin

Have another evaluation board, which is a "THRU" structure. This evaluation board should have the same PCB traces as your eval board minus the DUT (device under test). Hook this board up to your scope with the same cables, etc. you plan to evaluate your actual product. If your set up is good, you should just see the jitter from the scope or your generator.

 

[francx]

ok